A "dynamic translator" is computer program that translates an application program from a first to a second format while the application is executing. Typically, the dynamic translator translates a code block into the second format as program flow enters that code block. Then, the dynamic translator executes the translated code block within an emulated computer system. A dynamic translator can be used, for example, to run a SUN SPARC executable file on a PA RISC computer system by translating the application and emulating a SUN SPARC computer system.
When executing the application, the dynamic translator must accurately simulate the entire state and actions of the emulated computer system. Signal handling is one of the most difficult aspects of the computer system to simulate. Normally, if an application were executing and a signal arrived, then the operating system would create a snapshot of the machine state of the application as it existed when the signal arrived. This snapshot contains the values of all registers, the program counter, and the status bits. In short, the snapshot contains all visible CPU state information.
Therefore, if the application is executing under an emulator, the emulator needs to present the same snapshot when a signal arrives. Presenting the snapshot to the application, however, is very difficult. When the signal arrives, the operating system stops the translator and gives the translator a snapshot of the translation system itself, rather than a snapshot of the application. Accordingly, the translation system must create its own snapshot of the emulated computer system and application. Therefore, the translation system needs to track all visible state information for the emulated CPU.
When the translation system is emulating a CPU, however, it is desirable that the emulator not fully model the machine state. Consider, for example, the INTEL X86 architecture. The X86 architecture includes a large number of condition code flags. Each time the CPU executes an ADD instruction, the CPU sets flags indicating, among other things, whether the result was zero, greater than zero, or in parity. Accordingly, if the translation system fully models the CPU, every time it emulates an ADD it also has to materialize the values of the CPU flags. This emulation can be quite expensive in terms of system resources.
Moreover, there are many times when these flags are never used. Consider, for example, when the application executes three ADD instructions in a row. Each ADD instruction does not consume any flags, but instead sets them. If the translator knows that execution cannot stop in between the three ADDS, then there is no point in emulating the flags set by the first and second ADDs. Therefore, there is no need for the translator to materialize CPU flags for points at which execution cannot stop.
However, a LOAD instruction can generate a trap and thereby stop execution. A trap could occur, for example, if the instruction loads from an invalid address or performs a misaligned memory reference. If the instruction sequence is ADD, LOAD, ADD, then there is a possible stop point between the ADD instructions. Therefore, the translator must materialize the CPU flags because the flags might be consumed by a signal handler if the LOAD instruction traps. In sum, to fully implement signal handling, the translator must fully materialize the entire emulated machine state at any point at which execution could stop.
Still, the overwhelming majority of the machine state variables are never consumed. Accordingly, the translator wastes a lot of resources materializing the variables. Additionally, the translator attempts to execute the application as fast as is possible. For this reason, the translations are optimized using techniques such as out-of-order execution. If the instructions are being moved around and executed out of order, then it is sometimes impossible to generate a fully materialized machine state.
Therefore, there is a need in the art for a translator that properly handles signals but does not necessarily fully materialize the machine state.
There is also a need in the art for a translator that properly handles signals but operates quickly and efficiently.
In addition, there is a need in the art for a translator that properly handles signals while allowing code optimizations such as instruction reordering.